Carry-select adder

Results: 16



#Item
11Computer architecture / Theory of computation / Carry-lookahead adder / Thai alphabet / Carry / Carry-select adder / Kogge–Stone adder / Adders / Computer arithmetic / Arithmetic

วงจรประมวลผลดานคณิตศาสตร AU วงจรประมวลผลดานคณิตศาสตร AU   

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Source URL: somnuek.rmutl.ac.th

Language: English - Date: 2011-05-31 23:31:35
12Physics / Computer arithmetic / Binary logic / Carry-select adder / Carry-lookahead adder / Very-large-scale integration / Yield / Adders / Mechanics / Electronic engineering

Techniques for Yield Enhancement of VLSI Adders 1 Zhan Chen and Israel Koren Department of Electrical and Computer Engineering University of Massachusetts, Amherst, MA 01003, USA

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Source URL: euler.ecs.umass.edu

Language: English - Date: 2013-07-15 15:45:03
13Electronic engineering / Carry-select adder / Kogge–Stone adder / Carry-lookahead adder / Early completion / Carry-bypass adder / Adders / Computer architecture / Arithmetic

More Fast Adders 1 More Fast Adders Ivor Page1

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Source URL: www.utdallas.edu

Language: English - Date: 2002-01-29 10:29:09
14Mathematics / Computer architecture / Binary arithmetic / Binary logic / Elementary arithmetic / Carry-select adder / Carry-lookahead adder / Adders / Arithmetic / Computer arithmetic

1-Bit Adder (Half Adder) Simplest case - when two one bit numbers are to be added. With one bit - only the numbers 0 and 1 can be represented.

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Source URL: www-rohan.sdsu.edu

Language: English - Date: 2003-02-26 16:09:04
15Numbers / Adder / Carry-save adder / Carry-lookahead adder / Carry-select adder / Floating point / Wallace tree / Arithmetic logic unit / IEEE 754-2008 / Computer arithmetic / Arithmetic / Computer architecture

Eidgenossische ¨ Technische Hochschule

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Source URL: www.iis.ee.ethz.ch

Language: English - Date: 2006-03-07 18:40:33
16Data types / Theory of computation / Adders / Binary arithmetic / Carry-select adder / Kogge–Stone adder / Floating point / Single-precision floating-point format / IEEE 754-2008 / Computer arithmetic / Arithmetic / Computer architecture

An Operand-Optimized Asynchronous IEEE 754 Double-Precision Floating-Point Adder Basit Riaz Sheikh and Rajit Manohar

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Source URL: www.cs.columbia.edu

Language: English - Date: 2013-06-14 17:16:46
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